(China (Mainland))
Product Summary
The 21152AB is a kind of second-generation PCI-to-PCI bridge and is fully compliant with PCI Local Bus Specification, Revision 2.1. The device is pin-to-pin compatible with the 21052, which is fully compliant with PCI Local Bus Specification, Revision 2.0. The device provides full support for delayed transactions, enabling buffering of memory read, I/O, and configuration transactions. It allows the two PCI buses to operate concurrently, which means that a master and a target on the same PCI bus can communicate while the other PCI bus is busy. This traffic isolation may increase system performance in applications such as multimedia.
Parametrics
Absolute maximum ratings: (1)Tj : 125℃; (2)Supply voltage, Vcc: 3.9 V; (3)Maximum voltage applied to signal pins: 5.5 V; (4)Maximum power, PWC: 1.2 W @ 33 MHz; (5)Storage temperature range, Tstg: –55℃ to 125℃.
Features
Features: (1)Implements delayed transactions for all PCI configuration, I/O, and memory read commands-up to three transactions simultaneously in each direction; (2)Allows 88 bytes of buffering (data and address) for posted memory write commands in each direction-up to three transactions simultaneously in each direction; (3)Allows 72 bytes of read data buffering in each direction; (4)Provides concurrent primary and secondary bus operation to isolate traffic; (5)Provides five secondary clock outputs; (6)Provides arbitration support for four secondary bus devices; (7)Provides enhanced address decoding; (8)Includes downstream lock support; (9)Supports both 5 V and 3.3 V signaling environments.
Diagrams
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21150 |
Other |
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2115009-1 |
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